A sense amplifier circuit with faster sensing speed and improved
insensitivities to fabrication process variations (i.e., eliminated
functional failures) is provided herein. According to one embodiment, the
sense amplifier circuit associated with a row of memory cells within a
memory device may include a charging portion, which is coupled for
receiving a reference voltage that is supplied to at least one additional
sense amplifier circuit within the memory device. The reference voltage
is provided by a current reference generator, which is coupled to the
sense amplifier circuit(s) for detecting: (i) a maximum amount of current
that can pass through one compare stack within the memory cell array, or
(ii) a difference between the maximum amount of current and the current
contribution of an n-channel current source within the sense amplifier
circuit. A memory device and method of operating one embodiment of the
improved sense amplifier circuit are also provided herein.