Apparatus and methods for an interface are disclosed. In particular, an
apparatus for handling hardware requests over an interface between a
hardware circuit and another circuit, such as a radio frequency
integrated circuit (RFIC) is disclosed. The hardware request controller
apparatus utilizes a configuration memory that receives and stores data
concerning memory address locations within a data memory, also within the
controller. The data memory receives and stores read or write data used
for reading data from and writing data to the other circuit. The
controller apparatus also includes master state machine logic that
receives the hardware request commands from the hardware circuit and
determines which address locations are to be accessed in the data memory
based on the data concerning memory locations stored in the configuration
memory. An interface dependent logic, adapted to the particular interface
bus, is also provided to transfer read out data from the data memory to
the other circuit via an interface bus. Corresponding methods are also
disclosed.