One embodiment of the invention provides a system that facilitates
integrating a simulation log into a verification environment. The system
operates by first creating the simulation log during a simulation of a
register transfer language description of an integrated circuit design.
Next, for each entry in the simulation log, the system places a
corresponding entry in a "log entry table." When a user selects an entry
from the simulation log, the system determines a file offset for the
entry within the simulation log. Next, the system locates the
corresponding entry in the log entry table. The system then uses the log
entry table to locate entries within simulator state files, which
describe which portion of the integrated circuit is being simulated. This
enables the system to display the corresponding entries from the
simulator state files to a user.