An integrated circuit memory device, system and method turns on an output driver in response to a stored value that represents an amount of time from when the output driver is in an operational state to when the output driver begins to output valid read data in various embodiments. An output driver outputs valid read data after a settling amount of time. The sum of the amount of time from when the memory device receives a read command to when the output driver is turned-on and the settling amount of time, is approximately the time from receiving the read command, to at least beginning to provide valid read data at the output of the integrated circuit memory device. A read command is provided to the integrated circuit memory device by a memory controller. In an embodiment, the memory controller also provides or programs the value that represents the amount of time from when the output driver is in an operational state to when the output driver begins to output valid read data.

 
Web www.patentalert.com

> Chain ferroelectric random access memory (CFRAM) having an intrinsic transistor connected in parallel with a ferroelectric capacitor

~ 00310