A gain stage in a sense amplifier receives an input signal representing a
stored value and senses if the input signal is less than or not less than
a reference signal and generates an output signal indicative of a first
state when the input signal is less than the reference signal and an
output signal indicative of a second state when the input signal is not
less than the reference signal. The gain stage further comprises an
integrated latch configured to latch the output signal in either the
first or second state. Additionally, a controller operates a sense
amplifier having multiple operating modes. Sample mode switch logic
causes the sense amplifier to sample a first voltage applied to the sense
amplifier's input and hold and compare mode switch logic causes the sense
amplifier to hold the first voltage for comparison with a second voltage
applied to the sense amplifier's input.