A processor-based device (e.g., a wireless device) may include a processor and a semiconductor memory (e.g., a flash memory) to selectively pipeline and prefetch memory data, such as executable data, in one embodiment, using prefetch/pipeline logic that may enable storage of a first indication associated with executable data at a first storage location and a second indication associated with executable data at a second storage location. Upon retrieval, the prefetch/pipeline logic may selectively perform at least one of pipelining and prefetching of the executable data associated with the second storage location based on the first indication.

 
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