A processor executes an instruction set including instructions in which a
register specifier is implicitly derived, based on another register
specifier. One technique for implicitly deriving a register specifier is
to add or subtract one from a specifically-defined register specifier.
Implicit derivation of a register specifier is selectively implemented
for some opcodes. A decoder decodes instructions that use
implicitly-derived register specifiers and reads the explicitly-defined
register. The decoder generates pointers both to the explicitly-defined
register and to the implicitly-derived register. In other embodiments, a
pointer to registers within a register file includes an additional bit
indicating that a register read is accompanied by a read of an
implicitly-derived register.