A synapse configured of an A-MOS transistor has a learning function and can implement high integration similar to that of a DRAM because of its simplified circuit configuration and compact circuit size. With the presently cutting-edge technology (0.15 .mu.m CMOS), approximately 1G synapses can be integrated on one chip. Accordingly, it is possible to implement a neural network with approximately 30,000 neurons all coupled together on one chip. This corresponds to a network scale capable of associatively storing approximately 5,000 patterns.