A system and method to re-fetch operand data lost for instructions with operands greater than eight bytes in length due to line invalidation due to storage update from a single or plurality of processors in a multiprocessor computer system using microprocessors that perform out of order operand fetch with respect to sequential program order in which it is not possible or desirable to kill the execution of the instruction when the storage access rules require that it appear that the operand data is accessed in program execution order.

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< Adaptive prefetch of I/O data blocks

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> Controlling the propagation of a control signal by means of variable I/O delay compensation using a programmable delay circuit and detection sequence

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