A graphics processor is disclosed having a programmable Arithmetic Logic Unit (ALU) stage for processing pixel packets. Scalar arithmetic operations are performed in the ALUs to implement a graphics function.

 
Web www.patentalert.com

< Modifying a rasterized surface, such as by trimming

< Multipurpose functional unit with multiply-add and format conversion pipeline

> Cooling system for computer hardware

> Increased scalability in the fragment shading pipeline
~ 00276