A microprocessor is provided with protection circuits to secure access to
its registers. The microprocessor includes a plurality of protection
circuits, each associated with a register of the microprocessor. The
protection circuits automatically block selection of the registers after
each resetting of the microprocessor. The releasing of a protection
circuit associated with a register is done by the successive sending, on
the data bus, of N passwords proper to the register during N first
operations for the selection of the register with N.gtoreq.1. The
selection of the register is effective only for the subsequent operations
for selection of the register up to the next resetting of the
microprocessor.