In a system having a plurality of processing nodes, wherein each of the plurality of processing nodes has an assigned portion of system memory such that the assigned portion of system memory of each of the plurality of processing nodes is accessible by the plurality of processing nodes, a technique is presented that allows each of the plurality of processing nodes to perform a memory initialization and test of the processing node's assigned portion of system memory. One of the processing nodes can cause the others of the processing nodes to perform the memory initialization and test process or each processing node can automatically perform the memory initialization and test process.