A semiconductor memory device includes a memory array; a storage section that receives a maximum pulse value from a user of the semiconductor memory device; a control section that executes a writing processing or an erasing processing for the memory array and restarts the writing or erasing processing in the case where the processing for the memory array has failed; a counter section that counts up a number of processings performed by the control section; and a detection section that detects when the number of processings is equal to the maximum pulse value to prevent the control section from restarting the writing or erasing processing.