This invention provides a compiler, circuits and a method for generating a flash memory for integrated circuits. This invention provides a flash memory compiler which can generate flexible configurations which are a function of the flash memory array bit count. In addition, this flash compiler of this invention has the ability to optimize the resultant flash memories so as to produce the correct amount of flash array current driving capability and minimal wasting of power dissipation as a function of the flash memory array size.

 
Web www.patentalert.com

< Timing constraint generator

< Method of automated repair of crosstalk violations and timing violations in an integrated circuit design

> Gate reuse methodology for diffused cell-based IP blocks in platform-based silicon products

> System and method for reducing design cycle time for designing input/output cells

~ 00268