A parallel processor capable of establishing synchronization among programs executed in parallel, wherein a processor element suspends its processing and enters a waiting state when a wait instruction "sleep" is executed in a user program Prg_d and resumes the processing by releasing the above waiting state based on execution of a wait release instruction "cont(Prg_d)" by another processor element and wherein the latter processor element executes a next instruction without suspending its processing after executing the wait release instruction "cont(Prg_d)".