The present invention concerns a software system that tolerates transient errors made up by a processing unit, including:

    • at least two processing units (50, 51) with each one including:
    • a microprocessor (54, 57),
    • a memory (53, 56) protected by a device generating and controlling a code for the detection and correction of errors,
    • a device (55, 58) for monitoring memory accesses,
    • A centralized control device (52) for the processing units and for inputs/outputs, including:
    • macro-synchronization means,
    • data comparison/vote means,
    • correction demand means,
    • decision-making means,
    • means allowing the inputs/outputs to be made.
    • Some links (60, 61) respectively linking each processing unit to the device (52) for controlling the processing units and the inputs/outputs.
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