There is disclosed an architecture capable of accessing data and instructions of an external memory device using store and forward, which has a processor kernel, a cache module, a prefetch module, a switch, and a store and forward controller. The switch is provided for switching a connection from the processor kernel to the cache module or the prefetch module. The store and forward controller detects access between the prefetch module and the memory device, so as to command the switch to switch the connection from the processor kernel to the prefetch module when the prefetch module transfers data by burst transfer, such that data and instructions transferred from the memory device to the prefetch module are also transferred to the processor kernel.