A function interface system for use with a fast pattern processor having an internal function bus and an external function bus and a method of operating the same. In one embodiment, the function interface system includes a controller arbitration subsystem configured to process an issued function request received from at least one of the internal function bus and the external function bus and a dispatch subsystem configured to retrieve the issued function request and dispatch the issued function request to at least one associated co-processor via the controller arbitration subsystem.

 
Web www.patentalert.com

< System and method for simultaneous display of multiple information sources

< Cardiac stimulation device including sleep apnea prevention and treatment

> Simplifying verification of an SFI converter by data format adjustment

> Configurable memory design for masked programmable logic

~ 00239