The invention includes an integrated circuit (IC). The IC includes an internal test bus (ITB). The IC also includes a number of deskew clusters connected to the ITB. The deskew clusters each include a deskew controller. The IC also includes an integrated test controller (ITC) connected to the ITB. Further, the IC includes a debug unit connected to the ITC. The ITC generates a single global control signal and the deskew controller generates a first local command signal.

 
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> Fault tolerant operation of field programmable gate arrays

> Scan cell circuit and scan chain consisting of same for test purpose
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