An architecture for updating corrupted instructions in a computing device. The computing device includes a housing for enclosing a flash memory for storing a boot loader routine, and at least one boundary-scan device internal to the computing device for processing the boot loader routine, and operatively disposed on a boundary-scan bus. The housing includes a boundary-scan port through which updated instructions are communicated and power provided. The port is concealed under a label, cover, or in a location that limits access by the device owner, such as the battery well.