A ferro-electric memory device includes a semiconductor substrate, a first transistor formed on the semiconductor substrate, and a first ferro-electric capacitor electrically connected to the first transistor and formed of a first capacitor material layer having a first lower electrode, a first ferro-electric film, and a first upper electrode, the first ferro-electric capacitor being thicker at its central portion than at its ends.

 
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< Ferroelectric memory cell with angled cell transistor active region and methods for fabricating the same

> CMOS device having retrograde n-well and p-well

> Integrated circuit devices including raised source/drain structures having different heights

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