An object of the present invention is to provide a signal processor which improves the offset accuracy of a video signal without increasing the number of bits of a circuit. An N-bit adder (103) adds a video signal (S101) and an upper-N-bit signal of a brightness control signal (S102) as an offset value. A 1-bit pulse generator (107) generates a 1-bit pulse signal (S107) in which "1" and "0" have equal chances of appearing at random. A selector (106) selects the 1-bit pulse signal (S107) when the LSB of the brightness control signal (S102) is "1", while selects a ground level "0" when the LSB is "0", and supplies the selected signal to a carry input of the N-bit adder (103).