Positive/negative bit lines are arranged on a second-layer interconnection
the VDD power supply interconnection is arranged between the positive/negative
bit lines, the word line is arranged on a third-layer interconnection, and the
VSS power supply interconnection is arranged on a fourth-layer interconnection.
Alternatively, the word line is arranged on the second-layer interconnection, the
positive/negative bit lines are arranged on the third-layer interconnection, the
VDD power supply interconnection is arranged between the positive/negative bit
lines, and the VSS power supply interconnection is arranged on the fourth-layer
interconnection. Alternatively, the VDD power supply interconnection is arranged
on the second-layer interconnection, the positive/negative bit lines are arranged
on the third-layer interconnection, the word line is arranged on the fourth-layer
interconnection, and the VSS power supply interconnection is arranged on the fifth-layer interconnection.
