D/A converter of this invention including n+1 capacitors in total consisting
of one terminating capacitor (C0) and n binary-weighted capacitors (C1-4)
that are subjected to binary weighting ratio of 1:2:4: . . . :2(n-1),
and, an inverting amplifier (INV1), further comprising: a feedback switching
means (SWR5) provided between the input and output of the inverting amplifier
(INV1); a switching means for terminating operation (SWR0) supplies
one of two main reference voltages (VB,VT) to the terminating capacitor (C0),
and then, makes connection of the terminating capacitor (C0) to the output
of the inverting amplifier (INV1); a plurality of switching means for input
operation (SWD1-4,SWR1-4) makes selection of one of the two main
reference voltages (VB,VT) to be provided for the n binary-weighted capacitors
(C1-4) depending on digital data (D1-4), and then, makes connection
of the second terminal side of the n binary-weighted capacitors (C1-4) to
the output of the inverting amplifier (INV1).
