A through hole (114) is formed in a wafer (104) comprising a semiconductor
substrate (110). A seed layer (610) is sputtered on the bottom surface
of the wafer. The seed is not deposited over the through hole's sidewalls adjacent
the top surface of the wafer. A conductor (810) is electroplated into the
through hole. In another embodiment, a seed is deposited into an opening in a wafer
through a dry film resist mask (1110). The dry film resist overhangs the
edges of the opening, so the seed is not deposited over the opening's sidewalls
adjacent the top surface of the wafer. In another embodiment, a dielectric (120)
is formed in an opening in a semiconductor substrate (110) by a non-conformal
physical vapor deposition (PVD) process that deposits the dielectric on the sidewalls
but not the bottom of the opening. A seed (610) is formed on the bottom
by electroless plating. A conductor (810) is electroplated on the seed.
In another embodiment, a dielectric (2910) is formed in the opening to cover
the entire surface of the opening. A non-conformal layer (120) is deposited
by PVD over the sidewalls but not the bottom of the opening. The dielectric (2910)
is etched off the bottom with the non-conformal layer (120) as a mask. A
seed (610) is formed on the bottom by electroless plating. The non-conformal
layer can be formed by electroplating. It can be tantalum deposited by electroplating,
then anodized. Other embodiments are also provided.
