A non-volatile memory device includes a semiconductor substrate and an N-type
source
and drain within the substrate. An oxide-nitride-oxide (ONO) stack is formed over
the substrate. The ONO stack includes a thin bottom oxide layer. A P+ polysilicon
electrode is formed over the ONO stack. The memory device is operative to perform
a channel erase operation in which a pair of charge storing cells with the nitride
layer are erased simultaneously.
