An apparatus for speculatively predicting the direction of a branch instruction
in a pipelined microprocessor in a hybrid fashion. A branch target address cache
(BTAC) stores a direction prediction about executed branch instructions. The BTAC
is indexed by an instruction cache fetch address. The BTAC is accessed in parallel
with the instruction cache access, such that the direction prediction is provided
before the actual instruction is decoded which is presumed to be a branch instruction
corresponding to the direction prediction stored in the BTAC. In parallel with
the BTAC access, a branch history table (BHT) is accessed to provide a second speculative
direction prediction. The BHT is indexed with a gshare function of the instruction
cache fetch address and a global branch history stored in a global branch history
register. The BTAC also provides a selector that selects between the two speculative
direction predictions.
