Data processor controlled DC to DC converter system and method of operation

   
   

A flexible, reliable and economical DC to DC power converter system includes a plurality of DC to DC converter units, a pulse width modulation current share bus interconnecting the DC to DC converter units and a synchronization signal connected to each of the DC to DC converter units to synchronize each of the DC to DC converter units to the same frequency. Each DC to DC converter unit includes a power section, a controller and a standard universal interface connecting the power section to the controller such that the power section can be changed to accommodate different input voltages, output voltages and current loads without making significant hardware changes in the controller. The controller includes a digital signal processor having a calibration table matching control parameters to the specific circuit characteristics of the power section. The digital signal processor has a clock signal synchronized to the synchronization signal, resolves master/slave contention for controlling the output voltage in response to signals sent and received over the current share bus and generates pulse width modulation power switch control signals controlling the power section to operate in either dual or single converter mode at different frequencies in response to varying system output current demands.

 
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