A semiconductor device equipped with a TAB (tape automated bonding) tape. A
desired pattern of wiring is formed on one surface of the TAB tape and a
semiconductor chip having two or more chip electrodes is disposed on the
other surface of the TAB tape. The wiring and the chip electrodes are
electrically interconnected via bumps that are formed in through-holes of
the wiring in conforming relationship with the chip electrodes. This
prevents fault connection between the chip electrodes and the bumps.
