Circuit arrangement and method for an electronic system for time-delayed outputting of a switching signal

   
   

In order to ensure safe and reliable time-delayed signal outputting with a simple redundant structure of a circuit arrangement, a common actuating element acts on two timers with associated A/D converters. In this case, the time delay which is predetermined by the actuating element and is relevant for the outputting of the switching signal is determined by forming the difference between a total resistance, detected by measurement, and a first resistance element, detected by measurement. This is followed by a comparison of the difference, which reflects second resistance elements that is determined by computation, with a second resistance element which is determined by measurement. The switching signal is then output with a time delay when there is a match between the second resistance element determined by measurement and that determined by computation.

 
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