Image processing apparatus has a CPU that reduces operation capability of large scale integration circuit by switching large scale integration circuit to low power save mode

   
   

An image processing machine (F) such as facsimile machine includes at least one large scale integrated (LSI) circuit (12, 13, 14, 20, 21, 22, 30, 31) for executing image processing. A power supply unit (5) feeds electricity to the respective large scale integrated circuits. The image processing machine includes a controller (1) for lowering operation capability of some large scale integrated circuits when shifting into a power save mode. The image processing machine may further include oscillators for feeding clock signals to the respective large scale integrated circuits, and the control unit may cause the oscillators to issue the clock signals with a lower frequency when switching to the power save mode.

 
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