Apparatus for verifying the data retention in non-volatile memories

   
   

An apparatus for verifying the data retention in a non-volatile memory is described which comprises at least one multiplexer and at least one shift register. The multiplexer and the at least one shift register are disposed so that the data of the non-volatile memory are in input to the multiplexer the output of which is in turn in input to the at least one shift register. The apparatus comprises a logical circuitry which by suitable commands controls the data transfer from said multiplexer to said at least one shift register, the data loading and the output data shifting in said at least one shift register.

 
Web www.patentalert.com

< Functional clock generation controlled by JTAG extensions

< Method and apparatus for detecting AC removal

> On-chip logic analyzer

> Driver for integrated circuit chip tester

~ 00123