Apparatus having a cache and a loop buffer
   
   

Briefly, in accordance with one embodiment of the invention, a processor has a loop buffer and a cache that provides requested information to a processor core.

Brièvement, selon un mode de réalisation de l'invention, un processeur a un amortisseur de boucle et une cachette qui fournit des informations demandées à un noyau de processeur.
 
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