A voltage generation circuit including a capacitor, an n-channel MOS transistor, a p-channel MOS transistor and the like. The n-channel transistor has a source terminal connected to a node and a drain terminal employed as an output terminal for a negative voltage, the p-channel MOS transistor has a source terminal connected to the aforementioned node and a drain terminal employed as a ground terminal, gate terminals of the n-channel MOS transistor and the p-channel transistor are connected in common, and clock signals inverted in phase to each other are applied to the common node and a first terminal of the capacitor.

 
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