A register file bit includes a primary latch and a secondary latch with a
feedback path and a context switch mechanism that allows a fast context
switch when execution changes from one thread to the next. A bit value
for a second thread of execution is stored in the primary latch, then
transferred to the secondary latch. The bit value for a first thread of
execution is then written to the primary latch. When a context switch is
needed (when the first thread stalls and the second thread needs to begin
execution), the register file bit can perform a context switch from the
first thread to the second thread in a single clock cycle. The register
file bit contains a backup latch inside the register file itself so that
minimal extra wire paths are needed to or from the existing register
file.