An integrated circuit includes an operational amplifier configured to receive a current sense voltage (V.sub.CS) at a first input and an offset voltage at a second input. A comparator is coupled to the operational amplifier and adapted to receive at a first input an output voltage signal (V.sub.OUT) of the operational amplifier. A voltage limiting circuit is configured to receive a regulation voltage. A fold back correction circuit is coupled to the voltage limiting circuit and to a second input of the comparator. A pulse width modulator circuit is coupled to the comparator and is adapted to receive the output of comparator.