Low temperature, multi-layered microshells for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The pre-sealing layer includes a large surface area getter layer to remove contaminants from the space ultimately enclosed by the microshell to improve the pressure control and cleanliness of the microshell.

 
Web www.patentalert.com

< Self-aligned strap for embedded trench memory on hybrid orientation substrate

< Introduction of metal impurity to change workfunction of conductive electrodes

> Method of manufacturing a plurality of semiconductor devices and carrier substrate

> Integrated stacked capacitor and method of fabricating same

~ 00615