A system and method are disclosed for generating triggers within a hardware emulator. The system allows for dynamic reconfiguration of the trigger generation scheme during emulation. In one aspect, input probe signals are received on an address port to a memory from an integrated circuit within the emulator. The memory outputs from a data port, data, which is addressed, at least in part, by the input probe signals. The data output from the data port may be sent through further combinatorial logic or directly connected to a logic analyzer and represents trigger information. In another aspect, the trigger generation scheme may be reconfigured dynamically during emulation. For example, where the memory is a dual-port RAM, an emulation host can write to the memory to perform the reconfiguration.

 
Web www.patentalert.com

< Method and system of determining the execution point of programs executed in lock step

< System and method for multi-layered network communications

> Floating frame timing circuits for network devices

> Phase error determination method and digital phase-locked loop system

~ 00612