A circuit for use in an image sensor as well as an image sensing system using the circuit are set forth. The circuit comprises a memory device having a non-volatile memory cell, a control gate, a drain and a source. The circuit also employs a photosensitive semiconductor device that is positioned for exposure to electromagnetic radiation from an image. A pixel control circuit is connected to these components to direct the memory device and the photosensitive semiconductor device to a plurality of controlled modes. The controlled modes may include an erase mode and an exposure mode. In the erase mode, at least a portion of an electric charge is removed from the non-volatile memory cell to place the memory device in an initialized state. In the exposure mode, the non-volatile memory cell is charged at least partially in response to a voltage at a terminal of the photosensitive semiconductor device. The voltage at the terminal of the photosensitive semiconductor device corresponds to exposure of the photosensitive semiconductor device to the electromagnetic radiation from the image. The pixel control circuit may also direct the memory device and the photosensitive semiconductor device to further modes including a read mode and a data retention mode. In the read mode, current flow between the source and drain of the memory device is detected as an indicator of the charge on the non-volatile memory cell. In the data retention mode, the charge on the non-volatile memory cell of the memory device that was acquired during the exposure mode is maintained notwithstanding further exposure of the photosensitive semiconductor device to the electromagnetic radiation from the image. The circuit, and one or more peripheral support circuits, may be implemented in a monolithic substrate using, for example, conventional CMOS manufacturing processes.