Flash memory is accessed via mapping tables comprising a master mapping table and at least one secondary mapping table. The master mapping table contains indexes to the secondary mapping tables. The secondary mapping tables contain indexes to locations in the flash memory. The mapping tables are maintained in the flash memory. Upon initialization subsequent a safe power shutdown, the master mapping table is cached and secondary mapping tables are cached as needed. Upon initialization subsequent an unsafe power shutdown, the mapping tables are constructed in accordance with a multiple-phase process. In an example embodiment, the multiple-phase process comprises locating all the secondary mapping tables stored in the flash memory, determining which secondary mapping tables are valid, determining which secondary mapping tables are invalid, determining which sectors of the flash memory are free, and constructing the master mapping table and the secondary mapping tables from this information.