A ramp generation circuit including, a charge supply unit which generates predetermined charges every predetermined time, an integration circuit which accumulates the charges generated from the charge supply unit and converts the charges into a voltage, and, an attenuation unit which outputs, to an output terminal, a voltage obtained by attenuating a noise value of an output voltage from the integration circuit.

 
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> A/D converter

> Semiconductor chip with a number of A/D converters that include a group of redundant A/D converters

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