A non-volatile memory device has individual pages of memory cells to be sensed in parallel. The memory device includes a source level tracking circuit coupled to receive a predetermined word line voltage from a word line voltage supply and the voltage level at the aggregate source node of one or more pages and coupled to provide to word lines of the memory an output voltage during the sensing operation, where the source level tracking circuit includes an op amp whereby the output voltage is the word line voltage offset by an amount to track the voltage level at the aggregate node and compensate for source bias errors due to a finite resistance in the ground loop.

 
Web www.patentalert.com

< Information storage device with sheet metal projections and elastomeric inserts

< Method of making memory cell with voltage modulated sidewall poly resistor

> Robust, self-maintaining file system

> Integrated non-volatile memory and peripheral circuitry fabrication

~ 00601