Disclosed is a receiving device which comprises first and second AD converters for inputting a received analog signal and converting the analog signal to digital signals in response to sampling clock signals of mutually different phases, first and second adaptive equalizers for respectively receiving outputs of the first and second AD converters, third and fourth adaptive equalizers for respectively receiving outputs of the second and first AD converters, a first adder for adding the outputs of the first and second adaptive converters, a second adder for adding the outputs of the third and fourth adaptive equalizers, a first decision unit for receiving the output of the first adder, deciding a received symbol for output, and outputting a decision error, a second decision unit for receiving the output of the second adder, deciding a received symbol for output, and outputting a decision error, and a multiplexing circuit for multiplexing the received symbols output from the first and second decision units, for output. The decision error from the first decision unit is supplied to the first and second adaptive equalizers, and the decision error from the second decision unit is supplied to the third and fourth adaptive equalizers.

 
Web www.patentalert.com

< Enhanced data rate receiver

> Method and system for loop recording with overlapping events

> Method and apparatus for generating a channel estimate using a non-pilot portion of a signal

~ 00597