The circuit structure includes at least two generally parallel conductor structures, and a plurality of substantially horizontal layers of layer dielectric material interspersed with substantially horizontally extending relatively low dielectric constant (low-k) volumes. The substantially horizontal layers and the substantially horizontally extending volumes are generally interposed between the at least two generally parallel conductor structures. Also included are a plurality of substantially vertically extending relatively low-k volumes sealed within the substantially horizontal layers and the substantially horizontally extending volumes between the at least two generally parallel conductor structures. The substantially vertically extending relatively low-k volumes and the substantially horizontally extending relatively low-k volumes reduce parasitic capacitance between the at least two generally parallel conductor structures as compared to an otherwise comparable microelectronic circuit not including the relatively low-k volumes.