A test system employing a test controller compressing data, a data compressing circuit and a test method are provided. The test system includes a tester, a device under test (DUT), and a test controller receiving a first clock signal and serial data bits output from the DUT, compressing the serial data bits by m bits (m.gtoreq.4) in response to a second clock signal to generate a signature signal, and outputting the signature signal to the tester. The tester compares a computed signature signal to a 1-bit signature signal to determine whether the DUT is operating poorly or not.