A method of manufacturing an integrated circuit package. The method includes attaching a first surface of a semiconductor die to a thermally and/or electrically conductive substrate, forming a plurality of die connectors on a second surface of the semiconductor die, and encapsulating the semiconductor die and the plurality of die connectors in an encapsulant material. The method also includes removing a portion of the encapsulant material to expose one or more of the plurality of die connectors, thereby forming a routing surface. The method further includes forming a plurality of conductive traces on the routing surface. Each of the plurality of conductive traces is characterized by a first portion in electrical communication with one of the plurality of die connectors and a second portion in electrical communication with a package connector.

 
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< Silicon-based packaging for electronic devices

> Semiconductor device with wirings having varying lengths

> Interconnect structure using through wafer vias and method of fabrication

~ 00586