An embodiment provides a system for testing a circuit. During operation,
the system scans-in input values into a first set of flip-flops. The
outputs of the first set of flip-flops are coupled with the inputs of a
circuit under test, the outputs of the circuit are coupled with the
inputs of a set of multiplexers, and the outputs of the set of
multiplexers are coupled with the inputs of a second set of flip-flops.
Next, the system configures the set of multiplexers using a
segment-selection circuit, which causes the outputs of the circuit to be
coupled with the inputs of the second set of flip-flops. The system then
captures the circuit's output values using the second set of flip-flops.
Next, the system scans-out the circuit's output values using the second
set of flip-flops. Finally, the system determines whether the chip has a
fault using the output values.