A level shift circuit, a shift register, and a display device in which
circuit operation is resistant to influence of variations in
characteristics of elements such as transistors. The level shift circuit,
includes a first switch turning on or off in accordance with a voltage of
a first node, switching ON and OFF when the voltage is a first threshold
value, and outputting a first voltage when ON state; a second switch
turning on or off in accordance with the voltage of a second node,
switching ON and OFF when the voltage is a second threshold value, and
outputting a second voltage when ON state; a first capacitor receiving a
first input signal at one terminal and connected at the other terminal to
the first node; a second capacitor receiving a second input signal at one
terminal, and connected at the other terminal to the second node; and a
circuit for setting the voltage of the first node at the first threshold
value and setting the voltage of the second node at the second threshold
value in a predetermined period and setting the first node and the second
node in a floating state after the predetermined period.