A flash storage device comprises a plurality of channels of flash storage, a system memory, and a controller. The controller is configured to cache, in the system memory, data to be written, to partition the data into a plurality of data portions, to generate error correction information based on the plurality of data portions, to write the error correction information to a first one or more of the plurality of channels of flash storage, and to write each of the plurality of data portions to a different one of the plurality of channels of flash storage other than the first one or more thereof.

 
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> Sidewall structured switchable resistor cell

> MEMORY CELL THAT EMPLOYS A SELECTIVELY FABRICATED CARBON NANO-TUBE REVERSIBLE RESISTANCE-SWITCHING ELEMENT, AND METHODS OF FORMING THE SAME

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