An integrated circuit package comprises a substrate including a core layer with a through opening and vias. A first conductive layer is on the core layer covering the through opening and a second conductive layer is on the core layer opposite the first conductive layer in the through opening and in the vias contacting the first conductive layer. An integrated circuit die is bonded to the second conductive layer and in the through opening. Connections are between the integrated circuit die and the second conductive layer, and the integrated circuit die and the connections are encapsulated.

 
Web www.patentalert.com

< Semiconductor device including substrate and upper plate having reduced warpage

> Semiconductor device and electronic control unit using the same

> Hysteretic MEMS two-dimensional thermal device and method of manufacture

~ 00563